Purists may argue that you can't create true eye diagrams by using the eye-scan mode of Agilent's new 68-channel, 300/600-MHz (state), 1.2-GHz (timing)/4-GHz (timing-zoom), deep-memory logic-analysis ...

Select between the Combination or Sequential circuit for analysis (Figure 16). Figure 16: Screen to select Combinational or Sequential Circuit Select the number of inputs (max of 3) and number of ...

This file type includes high resolution graphics and schematics. The logic analyzer is a versatile tool that can help engineers with digital hardware debug, design verification, and embedded software ...

Double-data-rate synchronous dynamic random access memory (DDR SDRAM) physical-layer testing is a crucial step in making sure devices comply with the JEDEC specification. The ultimate goal is to ...

Let's assume that you need to simultaneously look at the inputs and outputs of a 16-bit counter to determine a timing error, but you have only a 2-channel scope – how do you look all of the required ...